Frame, bit and chip error rate evaluation for a DSSS communication system Evaluación de la tasa de errores en bit, chip y tramas para un sistema de comunicacines DSSS

The re la tion be tween chips, bits and frames er ror rates in the Ad di tive White Gaussi an Noise (AWGN) chan nel for a Di rect Se quence Spread Spec trum (DSSS) sys tem, in Mul ti ple Ac cess In ter fer ence (MAI) con di tions is eval u ated. A sim ple er ror-correction code (ECC ) for the Frame Er ror Rate (FER) eval u a tion is used. 64 bits (chips) Pseudo Noise (PN) se quences are em ployed for the spread spec trum trans mis sion. An it er a tive Montecarlo (sto chas tic) sim u la tion is used to eval u ate how many er rors on chips are in tro duced for chan nel ef fects and how they are re lated to the bit er rors. It can be ob served how the bit er rors may even tu ally cause a frame er ror, i. e. CODEC or com mu ni ca tion er ror. These re sults are use ful for ac a dem ics, en gi neers, or pro fes sion als alike.